Computer Chips

An exploration of computer chips across three layers (semiconductor physics, logical circuits, and information processing).

Author
Abstract

The course addresses computer construction from both practical and theoretical perspectives in the context of military and safety-critical systems: computer chips are used, among other things, in data centres, ground stations, satellites, missiles, wearable devices, drones, robots, vehicles, ships, and aircraft. We study chips at three layers: the physical layer (semiconductors and other nanotechnology), the logical layer (specification and integration of complex components at various scales), and the information layer (how computers process information). The validation and verification of the performance and safety aspects of computer chips are also covered.

Learning outcomes. Upon successful completion of this course, the student is able to:

  • Describe, using logical and mathematical principles, the layered computer architecture and distinguish between hardware and software functions.
  • Understand the physical foundations of computer chips and semiconductor technology, determine the limits of miniaturisation, and follow new developments in quantum technology in a nutshell.
  • Specify the logical structure and function of combinational and sequential circuits of synchronous and asynchronous components.
  • Understand the storage and processing of information in digital systems in terms of number and data representations and arithmetic operations, and use the concepts of ‘complexity’ and ‘correctness’ correctly.
  • Describe and critically examine the design process (validation and verification), the performance and safety aspects of chips (cooling, electromagnetic shielding, interconnection), the manufacturing process, reverse-engineering techniques, and the supply chain, in the context of various military and safety-critical systems.

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Topics

  1. The fundamental principles of computer chips: information systems, layered architecture (physical, logical, information), components, interfaces, connectors, integrations.

  2. The function, mechanism, and operation of nano-scale devices at the physical layer (CMOSFETs, switching speed, power dissipation and Landauer’s principle, transistor density, Moore’s Law, Dennard’s Law).

  3. The logical formulation of component specifications (logic functions, Karnaugh maps, multiplexers), their temporal behaviour (events, feedback, oscillation, glitch, stability) and their spatial mapping (place and route, GDS).

  4. Integration of components in combinatorial/sequential circuits (synchronous and asynchronous logic, clock domain, buffer, latch, flip-flop, register, SRAM) and mixed analog/digital circuits (DRAM, DAC/ADC, compute in memory).

  5. The representation of numbers (bit-nibble-byte, big/little endian words, two’s complement) and digital circuits (shift, addition, subtraction, multiplication, modulus, ALU, floating points, tables, bitmaps, character encoding).

  6. Very large scale integration (VLSI).

  7. An overview of process design kits (PDK), wafer production, quality control (WAT), packaging processes (bonding, chiplets), radiation and single upset events, fault injection and reverse engineering techniques.

  8. The concepts of scaling, complexity, compute/power, the hardware ‘Trojan horse’, the tower of Babel, criticism of the ideal Turing machine, and future outlook and state-of-the-art chips (wafer-scale integration, superconductivity, neuromorphic architectures, photonic integrated circuits).

Schedule

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Materials

  • Logic Gates, Circuits, Processors, Compilers and Computers
    Jan Friso Groote, Rolf Morel, Julien Schmaltz, Adam Watkins
    ISBN: 9783030685522

References

Assessment

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Miscellaneous

Cover image: Brendan G.

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